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simple sequencers ? in 6-lead sc70 adm1085/adm1086/adm1087/adm1088 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features provide programmable time delays between enable signals can be cascaded with power modules for multiple supply sequencing power supply monitoring from 0.6 v output stages high voltage (up to 22 v) open-drain output (adm1085/adm1087) push-pull output (adm1086/adm1088) capacitor-adjustable time delays high voltage (up to 22 v) enable and v in inputs low power consumption (15 a) specified over C40c to +125c temperature range 6-lead sc70 package applications desktop/notebook computers, servers low power portable equipment routers base stations line cards graphics cards functional block diagrams capacitor adjustable delay 0.6v adm1085/adm1086 v in enout enin cext v cc gnd capacitor adjustable delay 0.6v adm1087/adm1088 v in enout enin cext v cc gnd 04591-001 figure 1. general description the adm1085/adm1086/adm1087/adm1088 are simple sequencing circuits that provide a time delay between the enabling of voltage regulators and/or dc-dc converters at power- up in multiple supply systems. when the output voltage of the first power module reaches a preset threshold, a time delay is initiated before an enable signal allows subsequent regulators to power up. any number of these devices can be cascaded with regulators to allow sequencing of multiple power supplies. threshold levels can be set with a pair of external resistors in a voltage divider configuration. with appropriate resistor values, the threshold can be adjusted to monitor voltages as low as 0.6 v. the adm1086 and adm1088 have push-pull output stages, with active high (enout) and active low ( enout ) logic outputs, respectively. the adm1085 has an active-high (enout) logic output; the adm1087 has an active-low ( enout ) output. both the adm1085 and adm1087 have open-drain output stages that can be pulled up to voltage levels as high as 22 v through an external resistor. this level-shifting property ensures compatibility with enable input logic levels of different regulators and converters. all four models have a dedicated enable input pin that allows the output signal to the regulator to be controlled externally. this is an active high input (enin) for the adm1085 and adm1086, and an active low input ( enin ) for the adm1087 and adm1088. the simple sequencers are specified over the extended ?40c to +125c temperature range. with low current consumption of 15 a (typical) and 6-lead sc70 packaging, the parts are suitable for low-power portable applications. table 1. selection table output stage part no. enable input enout enout adm1085 enin open-drain adm1086 enin push-pull adm1087 enin open-drain adm1088 enin push-pull
adm1085/adm1086/adm1087/adm1088 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 circuit information .......................................................................... 9 timing characteristics and truth tables .................................. 9 capacitor-adjustable delay circuit ............................................9 open-drain and push-pull outputs ....................................... 10 application information ................................................................ 11 sequencing circuits ................................................................... 11 dual lofo sequencing ............................................................ 13 simultaneous enabling .............................................................. 13 power good signal delays ........................................................ 13 quad-supply power good indicator ....................................... 14 sequencing with fet switches ................................................. 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 4/06rev. 0 to rev. a added lead-free models ..................................................universal update outline dimensions ......................................................... 15 changes to ordering guide .......................................................... 15 7/04revision 0: initial version
adm1085/adm1086/adm1087/adm1088 rev. a | page 3 of 16 specifications v cc = full operating range, t a = ?40c to +125c, unless otherwise noted. table 2. parameter min typ max unit test conditions/comments supply v cc operating voltage range 2.25 3.6 v v in operating voltage range 0 22 v supply current 10 15 a v in rising threshold, v th_rising 0.56 0.6 0.64 v v cc = 3.3 v v in falling threshold, v th_falling 0.545 0.585 0.625 v v cc = 3.3 v v in hysteresis 15 mv v in to enout/ enout delay v in rising 35 s cext floating, c = 20 pf 2 ms cext = 470 pf v in falling 20 s v in = v th_falling to (v th_falling C 100 mv) v in leakage current 170 a v in = 22 v cext charge current 125 250 375 na threshold temperature coefficient 30 ppm/c enin/ enin to enout/ enout propagation delay 0.5 s v in > v th_rising enin/ enin voltage low 0.3 v cc ? 0.2 v enin/ enin voltage high 0.3 v cc + 0.2 v enin/ enin leakage current 170 a enin/ enin = 22 v enout/ enout voltage low 0.4 v v in < v th_falling (enout), v in > v th_rising ( enout ), i sink = 1.2 ma enout/ enout voltage high (adm1086/adm1088) 0.8 v cc v v in > v th_rising (enout), v in < v th_falling ( enout ), i source = 500 a enout/ enout open-drain output leakage current (adm1085/adm1087) 0.4 a enout/ enout = 22 v
adm1085/adm1086/adm1087/adm1088 rev. a | page 4 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v cc ? 0.3 v to +6 v v in ? 0.3 v to +25 v cext ? 0.3 v to +6 v enin, enin ? 0.3 v to +25 v enout, enout (adm1085, adm1087) ? 0.3 v to +25 v enout, enout (adm1086, adm1088) ? 0.3 v to +6 v operating temperature range ?40c to +125c storage temperature range ?65c to +150c ja thermal impedance, sc70 146c/w lead temperature soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensitive device. electrosta tic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pr ecautions are recommended to avoid performance degradation or loss of functionality.
adm1085/adm1086/adm1087/adm1088 rev. a | page 5 of 16 pin configuration and fu nction descriptions enin/enin 1 gnd 2 v in 3 v cc 6 cext 5 enout/enout 4 adm1085/ adm1086/ adm1087/ adm1088 top view (not to scale) 04591-002 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 enin, enin enable input. controls the status of the enable o utput. active high for adm1085/adm1086. active low for adm1087/adm1088. 2 gnd ground. 3 v in input for the monitored voltage signal. can be biased via a voltage divider resistor network to customize the effective input threshold. can precisely monitor an analog power supply output signal and detect when it has powered up. the voltage applied at this pin is compared with a 0.6 v on-chip reference. with this reference, digital signals with various logic level thresholds can also be detected. 4 enout, enout enable output. asserted when the voltage at v in is above v th_rising and the time delay has elapsed, provided that the enable input is asserted. active hi gh for the adm1085/adm1086. active low for the adm1087/adm1088. 5 cext external capacitor pin. the capacitance on this pin dete rmines the time delay on the enable output. the delay is seen only when the voltage at v in rises past v th_rising , and not when it falls below v th_falling . 6 v cc power supply.
adm1085/adm1086/adm1087/adm1088 rev. a | page 6 of 16 typical performance characteristics 700 500 520 540 560 580 600 620 640 660 680 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 temperature (c) v trip (mv) v trip rising v trip falling 0 4591-003 figure 3. v in threshold vs. temperature 12.0 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 2.1 2.4 2.7 3.0 3.3 3.6 v cc (v) i cc (a) t a = +125c t a = +25c t a = ?40c 0 4591-004 figure 4. supply current vs. supply voltage 20 18 16 14 12 10 8 6 4 2 0 0246810121416182022 v in (v) supply current (a) 0 4591-005 figure 5. supply current vs. v in voltage 200 180 160 140 120 100 80 60 40 20 0 0246810121416182022 v in (v) v in leakage current (a) t a = +125c t a = +25c t a = ?40c 0 4591-006 figure 6. v in leakage current vs. v in voltage 200 190 180 170 160 150 140 130 120 110 100 2.1 3.6 3.3 3.0 2.7 2.4 v cc (v) v in leakage current (a) t a = +125c t a = +25c t a = ?40c 0 4591-007 figure 7. v in leakage current vs. v cc voltage 10000 1 10 100 1000 0.1 0.01 100 2010 1 0.1 output sink current (ma) output voltage (mv) t a = +125c t a = +25c t a = ?40c 0 4591-008 figure 8. output voltage vs. output sink current
adm1085/adm1086/adm1087/adm1088 rev. a | page 7 of 16 120 100 80 60 40 20 0 2.1 2.4 2.7 3.0 3.3 3.6 supply voltage (v) output low voltage (mv) 0 4591-009 figure 9. output low vo ltage vs. supply voltage 100 0 10 20 30 40 50 60 70 80 90 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 temperature (c) propagation delay (s) 1mv/s 10mv/s 0 4591-010 figure 10. v cc falling propagation delay vs. temperature 500 450 400 350 300 250 200 150 100 50 0 2.1 2.4 2.7 3.0 3.3 3.6 supply voltage (v) fall time (ns) 0 4591-011 figure 11. output fall time vs. supply voltage 200 180 160 140 120 100 80 60 40 20 0 0246810121416182022 enin/enin (v) enin/enin leakage (a) t a = +125c t a = +25c t a = ?40c 0 4591-012 figure 12. enin/ enin leakage current vs. enin/ enin voltage 200 180 160 140 120 100 80 60 40 20 0 2.1 3.6 3.3 3.0 2.7 2.4 v cc (v) enin leakage (a) t a = +125c t a = +25c t a = ?40c 0 4591-013 figure 13. enin/ enin leakage current vs. v cc voltage 10000 1000 100 10 1 0.1 0.562 26200 4480 2350 520 241 53.2 22.9 5.02 2.390 timeout delay (ms) cext (nf) 0 4591-014 figure 14. cext capacitance vs. timeout delay
adm1085/adm1086/adm1087/adm1088 rev. a | page 8 of 16 300 100 120 140 160 180 200 220 240 260 280 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 temperature (c) charge current (na) 0 4591-015 figure 15. cext charge current vs. temperature 100 0 10 20 30 40 50 60 70 80 90 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 temperature (c) propagation delay (s) 0 4591-016 figure 16. v in to enout/ enout propagation delay (cext floating) vs. temperature 100 0 10 20 30 40 50 60 70 80 90 1 10 100 1000 comparator overdrive (mv) transient duration (s) 0 4591-017 figure 17. maximum v in transient duration vs. comparator overdrive
adm1085/adm1086/adm1087/adm1088 rev. a | page 9 of 16 circuit information timing characteristics and truth tables the enable outputs of the adm1085/adm1086/adm1087/ adm1088 are related to the v in and enable inputs by a simple and function. the enable output is asserted only if the enable input is asserted and the voltage at v in is above v th_rising , with the time delay elapsed. table 5 and table 6 show the enable output logic states for different v in /enable input combinations when the capacitor delay has elapsed. the timing diagrams in figure 18 and figure 19 give a graphical representation of how the adm1085/adm1086/adm1087/adm1088 enable outputs respond to v in and enable input signals. table 5. adm1085/adm1086 truth table v in enin enout v th_rising 0 0 >v th_rising 1 1 table 6. adm1087/adm1088 truth table v in enin enout v th_rising 1 1 >v th_rising 0 0 v in enin enout t en v th_rising v th_falling 04591-023 figure 18. adm1085/adm1086 timing diagram v in enin enout t en v th_rising v th_falling 04591-024 figure 19. adm1087/adm1088 timing diagram when v in reaches the upper threshold voltage (v th_rising ), an internal circuit generates a delay (t en ) before the enable output is asserted. if v in drops below the lower threshold voltage (v th_falling ), the enable output is deasserted immediately. similarly, if the enable input is disabled while v in is above the threshold, the enable output deasserts immediately. unlike v in , a low-to-high transition on enin (or high-to-low on enin ) does not yield a time delay on enout ( enout ). capacitor-adjustable delay circuit figure 20 shows the internal circuitry used to generate the time delay on the enable output. a 250 na current source charges a small internal parasitic capacitance (c int ). when the capacitor voltage reaches 1.2 v, the enable output is asserted. the time taken for the capacitor to reach 1.2 v, in addition to the propa- gation delay of the comparator, constitutes the enable timeout, which is typically 35 s. to minimize the delay between v in falling below v th_falling and the enable output deasserting, an nmos transistor is connected in parallel with c int . the output of the voltage detector is connected to the gate of this transistor so that, when v in falls below v th_falling , the transistor switches on and c int discharges quickly. 1.2v c c int cext signal from voltage detector to and gate and output stage v cc 250na 04591-025 figure 20. capacitor-adjustable delay circuit connecting an external capacitor to the cext pin delays the rise timeand therefore the enable timeoutfurther. the relationship between the value of the external capacitor and the resulting timeout is characterized by the following equation: t en = ( c 4.8 10 6 ) + 35 s
adm1085/adm1086/adm1087/adm1088 rev. a | page 10 of 16 open-drain and push-pull outputs the adm1085 and adm1087 have open-drain output stages that require an external pull-up resistor to provide a logic high voltage level. the geometry of the nmos transistor enables the output to be pulled up to voltage levels as high as 22 v. adm1085/adm1087 logic v cc ( 22v) 04591-026 figure 21. open-drain output stage the adm1086 and adm1088 have push-pull (cmos) output stages that require no external components to drive other logic circuits. an internal pmos pull-up transistor provides the logic high voltage level. adm1086/adm1088 v cc logic 04591-027 figure 22. push-pull output stage
adm1085/adm1086/adm1087/adm1088 rev. a | page 11 of 16 application information sequencing circuits the adm1085/adm1086/adm1087/adm1088 are compatible with voltage regulators and dc-to-dc converters that have active high or active low enable or shutdown inputs, with a choice of open-drain or push-pull output stages. figure 23 to figure 25 illustrate how each of the adm1085/adm1086/ adm1087/adm1088 simple sequencers can be used in multiple-supply systems, depending on which regulators are used and which output stage is preferred. in figure 23 , three adm1085s are used to sequence four supplies on power-up. separate capacitors on the cext pins determine the time delays between enabling of the 3.3 v, 2.5 v, 1.8 v, and 1.2 v supplies. because the dc-to-dc converters and adm1085s are connected in a cascade, and the output of any converter is dependent on that of the previous one, an external controller can disable all four supplies simultaneously by disabling the first dc-to-dc converter in the chain. for power-down sequencing, an external controller dictates when the supplies are switched off by accessing the enin inputs individually. 3.3v dc/dc in out en adm1085 v cc enout 3.3v enin cext v in 3.3v 2.5v dc/dc in out en adm1085 v cc enout 3.3v enin cext v in 3.3v 1.8v dc/dc in out en adm1085 v cc enout 3.3v enin cext v in 3.3v 1.2v dc/dc in out en enable control 12 v t en1 t en2 t en3 external disable 12v 3.3v 2.5v 1.8v 1.2v 0 4591-028 figure 23. typical adm1085 application circuit
adm1085/adm1086/adm1087/adm1088 rev. a | page 12 of 16 3.3v dc/dc in out en adm1086 v cc enout 3.3v enin cext v in 2.5v dc/dc in out en adm1086 v cc enout 3.3v enin cext v in 1.8v dc/dc in out en adm1086 v cc enout 3.3v enin cext v in 1.2v dc/dc in out en enable control 12 v t en1 t en2 t en3 external disable 12v 3.3v 2.5v 1.8v 1.2v 0 4591-029 figure 24. typical adm1086 application circuit 3.3v adp3334 in out sd adm1087 v cc enout 3.3v enin cext v in 2.5v adp3334 in out sd 12 v 0 4591-030 figure 25. typical adm1087 application circuit using adp3334 voltage regulators 3.3v adp3334 in out sd adm1088 v cc enout 3.3v enin cext v in 2.5v adp3334 in out sd 12 v 0 4591-031 figure 26. typical adm1088 application circuit using adp3334 voltage regulators
adm1085/adm1086/adm1087/adm1088 rev. a | page 13 of 16 dual lofo sequencing a power sequencing solution for a portable device, such as a pda, is shown in figure 27 . this solution requires that the microprocessor power supply turn on before the lcd display turns on, and that the lcd display power-down before the microprocessor powers down. in other words, the last power supply to turn on is the first one to turn off (lofo). an rc network connects the battery and the sd input of the adp3333 voltage regulator. this causes power-up and power- down transients to appear at the sd input when the battery is connected and disconnected. the 3.3 v microprocessor supply turns on quickly on power-up and turns off slowly on power- down. this is due to two factors: capacitor c1 charges up to 9 v on power-up and charges down from 9 v on power-down, and the sd pin has logic high and logic low input levels of 2 v and 0.4 v. for the display power sequencing, the adm1085 is equipped with capacitor c2 to create the delay between the micro- processor and display power turning on. when the system is powered down, the adm1085 turns off the display power immediately, while the 3.3 v regulator waits for c1 to discharge to 0.4 v before switching off. adm1086 enout 3.3v c2 enin cext v in c1 display power adp3333 5v sd 9v microprocessor power adp3333 2.5v sd 9 v 9v system power switch system power 9v 0v 9v 0v 2.5v 0v 5v 0v v c1 microprocessor power display power 04591-032 figure 27. dual lofo po wer-supply sequencing simultaneous enabling the enable output can drive multiple enable or shutdown regulator inputs simultaneously. 3.3v adp3333 in out sd adm1085 v cc enout 3.3v 3.3v enin cext v in 2.5v adp3333 in out sd enable control 12 v 1.8v adp3333 in out sd 12v 04591-033 figure 28. enabling a pair of regulators from a single adm1085 power good signal delays sometimes sequencing is performed by asserting power good signals when the voltage regulators are already on, rather than sequencing the power supplies directly. in these scenarios, a simple sequencer ic can provide variable delays so that enabling separate circuit blocks can be staggered in time. for example, in a notebook pc application, a dedicated microcomputer asserts a power good signal for north bridge? and south bridge? ics. the adm1086 delays the south bridge signal, so that it is enabled after the north bridge. adm1086 south bridge ic enout en 5v enin cext v in north bridge ic en 5v microcomputer 5 v 3.3v power_good 04591-034 figure 29. power good delay
adm1085/adm1086/adm1087/adm1088 rev. a | page 14 of 16 quad-supply power good indicator the enable output of the simple sequencers is equivalent to an and function of v in and enin. enout is high only when the voltage at v in is above the threshold and the enable input (enin) is high as well. although enin is a digital input, it can tolerate voltages as high as 22 v and can detect if a supply is present. therefore, a simple sequencer can monitor two supplies and assert what can be interpreted as a power good signal when both supplies are present. the outputs of two adm1085s can be wire-anded together to make a quad- supply power good indicator. adm1085 enout 3.3v 3.3 v enin v in 9v 5v adm1085 enout 3.3v enin v in 2.5v 1.8v power_good 04591-035 figure 30. quad-supply power good indicator sequencing with fet switches the open-drain outputs of the adm1085 and adm1087 can drive external fet transistors that can switch on power supply rails. all that is needed is a pull-up resistor to a voltage source that is high enough to turn on the fet. adm1085 enout 3.3v 12 v enin cext v in 2.5v 04591-036 figure 31. sequencing with a fet switch
adm1085/adm1086/adm1087/adm1088 rev. a | page 15 of 16 outline dimensions compliant to jedec standards mo-203-ab 0.22 0.08 0.30 0.15 1.00 0.90 0.70 seating plane 4 5 6 3 2 1 pin 1 0.65 bsc 1.30 bsc 0.10 max 0.10 coplanarity 0.40 0.10 1.10 0.80 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 0.46 0.36 0.26 figure 32. 6-lead thin shrink small outline transistor package [sc70] (ks-6) dimensions shown in millimeters ordering guide model temperature range ordering quantity package description package option branding adm1085aks-reel7 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m0v adm1085aksz-reel7 1 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m7r adm1086aks-reel7 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m0w adm1086aksz-reel7 1 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m8m adm1087aks-reel7 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m0x adm1087aksz-reel7 1 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m7s adm1088aks-reel7 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m0y ADM1088AKSZ-REEL7 1 ?40c to +125c 3k 6-lead thin shrink small outline transistor package (sc70) ks-6 m8n eval-adm1087eb evaluation board for the adm1087 device. this board can also be used to evaluate the other devices in the family. sample can be ordered separately. 1 z = pb-free part.
adm1085/adm1086/adm1087/adm1088 rev. a | page 16 of 16 t notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d04591-0-4/06(a) ttt

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